Electronics Weekly

LETI integrates III-V lasers on 200mm wafers using CMOS flow

Leti has integrated hybrid III-V silicon lasers on 200mm wafers using standard CMOS process flow. This shows the way to transitioning away from 100mm wafers and a process based on bulk III-V ...
Design-Reuse

Radiation Hardened SRAM Designed by RedCat Devices and Fabricated in TowerJazz's 0.18um Process Flow Withstands 15 Mrad Total Ionization Dose

Developed technology in TowerJazz commercial foundry opens multi-billion markets requiring specific components able to withstand high dose radiation Applications include electronics for communication, ...
EDN

Mixed-signal design flow enables RF CMOS chip

Spirea AB is a Swedish fabless semiconductor company developing highly integrated low-power, low-cost radio solutions for the Wireless LAN and PAN markets. This article describes how we assembled a ...
Electronics Weekly

Imec builds UV-sensitive CCD-in-CMOS TDI imager

Imec has built a high-speed UV-sensitive time-delay-integration (TDI) imager that is based on CCD-in-CMOS technology. The TDI imager has a quantum efficiency of more than 70% in the near-UV region, ...
Electronic Design

Simplified High-k/Metal-Gate Process Increases Planar CMOS Speed

IMEC, the Belgium-based nanotechnology research center, announced at this week's VLSI Symposium that it has improved the performance of its planar CMOS using hafnium-based, high-k dielectrics and ...