IC Manage Advances GDP-AI for Custom IC Design with Virtuoso

IC Manage today announced major advances to GDP-AI, its industry-leading design and IP management system, to further empower teams doing custom design in Cadence Virtuoso. The enhancements span ...
Nasdaq

GBT Filed a Nonprovisional Patent Application - IC Layout Design Rule Automatic Correction

This technology is a significant productivity enhancement system to reduce microchip’s layout design cycle, while enabling the design of advanced chips both faster and cheaper SAN DIEGO, Aug. 04, 2021 ...
EDN

Bringing MEMS into the IC design flow

Micro-electro-mechanical systems have been available for years, and have been successful in selected high-volume applications. But MEMS design is not as organized as it could be. MEMS design typically ...
Semiconductor Engineering

Enhancing Power Reliability Through Design-Stage Layout Optimization

As integrated circuit (IC) designs continue to scale, the demand for efficient power management, performance optimization and reliable physical layout modification grows more critical. Meeting these ...
Semiconductor Engineering

Boost High-Performance IC Design Flows With Early Interactive Symmetry Checking

In the realm of high-performance IC (integrated circuit) design, symmetry is not just an aesthetic preference—it’s a critical factor for ensuring proper device functionality, especially in analog and ...
EDN

Tool for custom-IC design allows verification in real time

Mentor Graphics’ new Calibre RealTime platform allows designers to execute physical verification in real time during IC-layout creation. The first release provides instantaneous DRC (design-rule ...
Nasdaq

Synopsys Introduces the Industry's First Unified Electronic and Photonic Design Platform

OptoCompiler combines specific capabilities for photonic design with industry-proven electronic design methods in a unique, unified platform to make photonic IC design accessible, fast, and flexible ...
Electronic Design

DFM Tools Optimize IC Layouts

Increasing price competition and narrower market windows are forcing designers to ensure that every design works right the first time, so improving design yield and ramp-up time are essential to a ...
Digi Times

Wistron ITS enters chip design race with new semiconductor division

Wistron ITS (WITS), a subsidiary of the Wistron Group, has officially launched a new Semiconductor Business Unit, marking its strategic shift from traditional IT services toward integrated circuit (IC ...
Electronic Design

How to Design a Chip for Under $1,000 (Part 1): Book Recommendations

In the first of a multi-part series on how to design a custom chip for under $1,000, our Analog Editor gets you started with a Magnificent 7 list of textbooks. TinyTapeout offers a course that ...
Digi Times

IC Design White Paper (1): Navigating policy options for strengthening Taiwan's IC design industry

The estimated revenue of Taiwan's IC design industry in 2022 totalled at a commanding US$40 billion. The sector has proven itself to be eminently high-yielding with an enviable average profit margin ...