Science Daily

Digital phase-locked loop achieves a power consumption of 0.265 mW

Scientists have developed an advanced phase-locked loop (PLL) frequency synthesizer that can drastically cut power consumption. This digital PLL could be an attractive building block for Bluetooth Low ...
Electronic Design

All digital phase-locked loop offers sub-mW power consumption

San Francisco, CA. At the 2017 International Solid-State Circuits Conference in San Francisco, imec, Holst Centre, and ROHM presented an all-digital phase-locked loop (ADPLL) for Internet-of-Things ...
Nature

Radiation-Hardened Phase-Locked Loop Circuits

Radiation-hardened phase-locked loop (PLL) circuits represent a critical advancement in safeguarding electronic systems against the deleterious effects of ionising radiation. These circuits are ...
Electronic Design

Driving the VCO in High-Voltage, High-Frequency Phase-Locked Loops

A phase-locked loop (PLL) is a feedback system that combines a voltage-controlled oscillator (VCO) and a phase detector in such a way that the oscillator signal tracks an applied frequency or ...