As chips become more heterogeneous with more integrated functionality, testing them presents increasing challenges — particularly for high-speed system-on-chip (SoC) designs with limited test pin ...
Design-for-test, or DFT, should facilitate high-quality test, not change the design. Test techniques and strategies need to supply a high-quality test that screens out defective devices, avoiding ...
A fabless semiconductor company’s world spins around two things, pushing design differentiation and getting those designs to market quickly and profitably. Yield isn’t just a manufacturing KPI. It’s a ...
Testing can represent as much as half the cost of semiconductor device manufacture. To reduce that, Mentor Graphics' TestKompress uses a new compression technology that lets designers cut the amount ...
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