Santa Clara, Calif. – January 16, 2006 – Tensilica, Inc., the only company to automate the design of optimized application-specific configurable processors for system-on-chip (SOC) design, today ...

Tensilica Inc. today announced the Xtensa V processor, its next-generation microprocessor core architecture that runs at 350MHz. Based on its Xtensa architecture, Xtensa V processors allow deployment ...

SANTA CLARA, Calif. USA and IWAKI, JAPAN – April 26, 2004 – Tensilica®, Inc. today announced that the Peripheral Products Division of ALPS Electronic Co., Ltd. has licensed the Xtensa® processor ...

The Stretch S7000 series microprocessors target image processing, DVRs and IP cameras with multiple Tensilica Xtensa cores and an ARM 9 microprocessor. The main Xtensa software configurable processor ...

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that SGS-TÜV Saar has independently certified that Cadence ® Tensilica ® Xtensa ® processors with ...

To efficiently and profitably exploit millions of available SoC gates, companies must acquire pre-verified IP blocks in the same way they now buy pre-tested chips. To do this, SoC design teams must ...

Today’s high-performance computing systems often require the designer to instantiate multiple CPU or DSP cores in their subsystem. However, the performance gained by using multiple CPUs comes with ...

Every engineer wants a microprocessor to fit an application like a glove. But nobody wants to design a micro for a specific application. Too expensive. Too much work. But today, engineers can get a ...

An increasing number of multi-threaded embedded applications want to leverage multicore designs. Symmetric Multiprocessing (SMP) RTOS provides automatic load balancing of multiple threads in a ...

Even though Phi’s feature set is geared toward 3D printers, it can also be used to drive other digital-fabrication machines, such as CNC machines. Watch this video on YouTube. “The ESP32-S3-WROOM-1 is ...