The steady march toward 3D ICs, namely mixed-signal or multi-technology systems-on-chip (SoC) or systems-in-package (SiP), is becoming a brisk jog. With a mix of military and government funding, and ...

Through-silicon vias (TSVs) provide essential interconnects between DRAM dies inside high-bandwidth memory stacks, silicon ...

Among the challenges of a widespread adoption of 3D ICs is how to test them, particularly when it comes to through-silicon vias (TSVs). While not necessarily presenting a roadblock, TSVs use in the ...

Globalfoundries claims a breakthrough in 3D stacking of chips with the demonstration of functional 20nm silicon wafers with integrated through-silicon vias. The technique allows chips to be stacked on ...

Fig 1. The system-in-package approach is part of the trend toward thinner and more integrated 3D IC packages for CPUs, GPUs, and FPGAs for use in camera modules and wireless products, where high ...

Beaverton, OR. The economic downturn is a good time to focus on R&D, and Cascade Microtech is taking advantage of the current economic situation to help its customers characterize high-frequency ...

The looming transistor scaling limits have driven the semiconductor industry to advance packaging in order to stay in line with Moore's Law. TSVs facilitate advanced semiconductor packaging by ...

SAN JOSE, CA--(Marketwired - Nov 5, 2014) - Tango Systems Inc., a leading innovator in high-performance, cost-effective physical vapor deposition (PVD) systems, today announced it has published ...

IMEC has introduced a ‘via-middle through-Si-via’ approach to 3D stacking. “This method is new to industry as it allows to reveal through-silicon via [TSV] contacts by using a silicon etch process,” ...

SANTA CLARA, Calif., May 28, 2014 - Applied Materials, Inc. today introduced the Endura® Ventura(TM) PVD system that helps customers reduce the cost of fabricating smaller, lower power, ...