Whether on the screen or in an exported file, the decoder output is not terribly readable – depending on the kind of interface you’re sniffing, be it I2C, UART or SPI, you will get five to ten lines ...

This repository contains the source code for the Cycle-Aware Graph Attention Neural Min-Sum (CA-GAT-NMS) decoder. This architecture addresses the severe performance ...

This repository contains an end-to-end design-to-decode simulation pipeline for superconducting transmon qubits. This work was carried out as a group project for VLSID 2026. The project connects ...